1. Field of the Invention
The present invention relates to an insulated gate semiconductor device used for power control. More specifically, the invention relates to a MOS gate device such as a switching power MOSFET (metal oxide semiconductor field effect transistor) and an IGBT (insulated gate bipolar transistor).
2. Description of the Related Art
To increase in switching frequency is effective in miniaturizing a power supply circuit such as a switching power supply. In other words, downsizing a passive element such as an inductance and a capacitor in a power supply circuit is effective. However, as the switching frequency heightens, a switching loss of switching elements such as a MOSFET and an IGBT increases. The increase in switching loss lowers the efficiency of a power supply. A decrease in switching loss due to a speedup of switching elements is therefore essential to miniaturization of a power supply circuit.
In MOS gate elements, such as a MOSFET and an IGBT, currently used as switching elements, a gate length is shortened and thus the opposing area of gate and drain electrodes is decreased. Consequently, the MOS gate elements can be increased in speed by reducing gate-to-drain capacitance.
If, however, the gate-to-drain capacitance is reduced to speed up the MOS gate elements, resonance occurs between parasitic inductance and switching element capacitance contained in wiring. The resonance becomes a factor in causing high-frequency noise (switching noise) at the time of switching. To suppress the switching noise, soft switching has to be performed or a filter circuit has to be provided or a gate drive circuit has to be devised. The suppression of switching noise increases costs.
As described above, conventionally, high-speed switching can be achieved by reducing gate-to-drain capacitance. However, switching noise should be suppressed and thus soft switching should be performed or an external circuit such as a filter circuit should be employed.
According to an aspect of the present invention, there is provided an insulated gate semiconductor device comprises a first semiconductor layer of a first conductivity type; a plurality of second semiconductor layers of a second conductivity type selectively formed in a surface area of the first semiconductor layer; at least one third semiconductor layer of the first conductivity type formed in a surface area of each of the second semiconductor layers; a plurality of first main electrodes connected to the second semiconductor layers and the third semiconductor layer, respectively; a fourth semiconductor layer formed on a bottom of the first semiconductor layer; a second main electrode connected to the fourth semiconductor layer; a control electrode formed on a surface of each of the second semiconductor layers, the third semiconductor layer, and the first semiconductor layer with a gate insulation film interposed therebetween; and at least one fifth semiconductor layer of the second conductivity type provided in the first semiconductor layer and connected to at least one of the plurality of second semiconductor layers, the fifth semiconductor layer having impurity concentration that is lower than that of the second semiconductor layers.